ASIC by design: automated design of digital signal processing application-specific integrated circuits

  title={ASIC by design: automated design of digital signal processing application-specific integrated circuits},
  author={D. Bouldin and W. Snapp and P. Haug and D. Sunderland and R. Brees and C. Sechen and W. Dai},
  journal={IEEE Circuits and Devices Magazine},
Comparing the optimized results to the baseline, we are achieving typically 10-20/spl times/ improvement in PDA. This allows gap closure to approach the optimization of a full custom design process while preserving the automation and design efficiency of ASIC design. Additionally, the reuse of each macro saves two to three staff-months, and each optimization script saves one to two staff-months. Hence, we achieve an overall reduction in design time even though it takes extra time to run these… Expand

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