AES design space exploration new line for scan attack resiliency

@article{Ali2014AESDS,
  title={AES design space exploration new line for scan attack resiliency},
  author={Subidh Ali and Ozgur Sinanoglu and Ramesh Karri},
  journal={2014 22nd International Conference on Very Large Scale Integration (VLSI-SoC)},
  year={2014},
  pages={1-6}
}
Crypto-chips are vulnerable to side-channel attacks. Scan attack is one such side-channel attack which uses the scan-based DFT test infrastructure to leak the secret information of the crypto-chip. In the presence of scan, an attacker can run the chip in normal mode, and then by switching to the test mode, retrieve the intermediate results of the crypto… CONTINUE READING