AEGIS-Based Efficient Solution for Secure Reconfiguration of FPGAs

  title={AEGIS-Based Efficient Solution for Secure Reconfiguration of FPGAs},
  author={Karim M. Abdellatif and Roselyne Chotin-Avot and Habib Mehrez},
  journal={Proceedings of the Third Workshop on Cryptography and Security in Computing Systems},
The reconfiguration of FPGAs includes downloading the bit-stream file which contains the new design on the FPGA. The option to reconfigure FPGAs dynamically opens up the threat of stealing the Intellectual Property (IP) of the design. Since the configuration is usually stored in external memory, this can be easily tapped and read out by an eaves-dropper. This work presents a low cost solution in order to secure the reconfiguration of FPGAs. The proposed solution is based on an efficient-compact… 
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