A trench-isolated power BiCMOS process with complementary high performance vertical bipolars

@article{Strachan2002ATP,
  title={A trench-isolated power BiCMOS process with complementary high performance vertical bipolars},
  author={Andy Strachan and P. P. Sethna and Natasha Lavrovskaya and R. Yang and Charles Dark and Bill Coppock},
  journal={Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting},
  year={2002},
  pages={41-44}
}
A new process for mixed-signal and power management applications is introduced. The process architecture is designed to achieve high V/sub A/, high f/sub T/ complementary 24 V bipolar devices coupled to 0.5 /spl mu/m CMOS and 24 V power MOS. For optimum performance and die size the process uses 1 /spl mu/m wide poly-filled trench isolation. 

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