A tool flow for predicting system level timing failures due to interconnect reliability degradation

@inproceedings{Guo2008ATF,
  title={A tool flow for predicting system level timing failures due to interconnect reliability degradation},
  author={Jin Guo and Antonis Papanikolaou and Michele Stucchi and Kris Croes and Zsolt Tokei and Francky Catthoor},
  booktitle={ACM Great Lakes Symposium on VLSI},
  year={2008}
}
The continuous scaling of feature dimensions and the introduction of new dielectric materials is pushing the interconnects closer to their reliability limits. Degradation mechanisms are becoming more pronounced, making the interconnect lifetime a challenge at the level of process qualification. Moreover, these mechanisms exhibit new properties, like gradual degradation of electrical parameters instead of abrupt breakdowns phenomena. As a result, it becomes more likely that systems will fail… CONTINUE READING