A timing-driven data path layout synthesis with integer programming

  title={A timing-driven data path layout synthesis with integer programming},
  author={Jaewon Kim and Sung-Mo Kang},
We propose an efficient data path synthesis algorithm which generates bit-sliced layouts. Since data path circuits have special characteristics which are different from those of random logic circuits, the dedicated synthesis system is required for efficient layouts. Our main goal in the data path synthesis is to satisfy the timing constraints of circuits as well as to reduce layout areas. Timing-driven placement and over-the-cell routing techniques are developed to generate data path modules… CONTINUE READING


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