A time-multiplexed FPGA architecture for logic emulation

@inproceedings{Jones1995ATF,
  title={A time-multiplexed FPGA architecture for logic emulation},
  author={David Jones and David Lewis},
  year={1995}
}
This thesis describes VEGA, a special-purpose logic emulation processor and associated software, designed to achieve maximum usable logic block density per unit silicon area and fast mapping. Logic blocks are represented by instructions stored in on-chip memories. A circuit is emulated by sequentially executing the instructions that describe it. Three independent execution units and a two-level memory hierarchy offer high emulation performance. FPGA-based logic emulators are capacity-limited by… CONTINUE READING

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