A tag based vector reduction circuit

Abstract

Fast and efficient vector reduction circuit is very important to the real time application. In this paper, a new tag based fully pipelined vector reduction circuit is proposed, which can concurrently handle multiple vectors input with arbitrary sequence. Meanwhile, the proposed circuit provides simple and efficient interface and access timing similar to a… (More)
DOI: 10.1109/HPEC.2015.7322442

Topics

6 Figures and Tables

Cite this paper

@article{Wei2015ATB, title={A tag based vector reduction circuit}, author={Ming Wei and Yi-Hua Huang}, journal={2015 IEEE High Performance Extreme Computing Conference (HPEC)}, year={2015}, pages={1-6} }