A survey of cache coherence schemes for multiprocessors

@article{Stenstrm1990ASO,
  title={A survey of cache coherence schemes for multiprocessors},
  author={Per Stenstr{\"o}m},
  journal={Computer},
  year={1990},
  volume={23},
  pages={12-24}
}
Schemes for cache coherence that exhibit various degrees of hardware complexity, ranging from protocols that maintain coherence in hardware, to software policies that prevent the existence of copies of shared, writable data, are surveyed. Some examples of the use of shared data are examined. These examples help point out a number of performance issues… CONTINUE READING

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