A study on Low-power challenges in NOC

  • Fardin Mohammadi Darvandi, Mohammad Trik, Danial Hodaraji, Kumarth Nazari
  • Published 2015

Abstract

In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and research communities, since power and energy issues still represent one of the limiting factors in integrating multiand many-cores on a single chip. After a… (More)

2 Figures and Tables

Topics

  • Presentations referencing similar topics