A study of signal integrity issues in through-silicon-via-based 3D ICs

@article{Liu2010ASO,
  title={A study of signal integrity issues in through-silicon-via-based 3D ICs},
  author={Chang Liu and Sung Kyu Lim},
  journal={2010 IEEE International Interconnect Technology Conference},
  year={2010},
  pages={1-3}
}
In this paper, we study the signal integrity issues of through-silicon-via (TSV)-based 3D IC layouts. Unlike the most existing work, our study reports the coupling noise among all nets and all TSVs used in a real processor design implemented in 3D. Our RTL-to-GDSII design flow consists of commercial tools, enhanced with various add-ons to handle TSV and 3D stacking. Using this tool flow, we generate GDSII-level layouts of 3D implementation and perform sign-off-level signal integrity analysis… CONTINUE READING

Citations

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Capacitive Coupling Mitigation for TSV-based 3D ICs

2015 IEEE 33rd VLSI Test Symposium (VTS) • 2015
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Highly Influenced

Directional through Glass Via (TGV) Antennas for Wireless Point-to-Point Interconnects in 3D Integration and Packaging

2017 IEEE 67th Electronic Components and Technology Conference (ECTC) • 2017
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