A streaming processing unit for a CELL processor

@article{Flachs2005ASP,
  title={A streaming processing unit for a CELL processor},
  author={Brian Flachs and Shigehiro Asano and S. Dhong and P. Hotstee and Gilles Gervais and R. Kim and Thanh-Huy Le and Pen Liu and Jens Leenstra and Jesse Liberty and Berkovitch Michael and Hangul Oh and S. M. Mueller and Osamu Takahashi and Akiyuki Hatakeyama and Yasuhiro Watanabe and Naoka Yano},
  journal={ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005.},
  year={2005},
  pages={134-135 Vol. 1}
}
The design of a 4-way SIMD streaming data processor emphasizes achievable performance in area and power. Software controls data movement and instruction flow, and improves data bandwidth and pipeline utilization. The micro-architecture minimizes instruction latency and provides fine-grain clock control to reduce power. 
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The Circuits and Physical Design of the Streaming Processor of a CELL Processor

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3 Excerpts

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The Vector Fixed Point Unit of the Streaming Processor of a CELL Processor,

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1 Excerpt

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