A simulation analysis of quarter-micron CMOS LSI input circuit behavior under CDM-ESD for protection device improvement

@article{Narita1999ASA,
  title={A simulation analysis of quarter-micron CMOS LSI input circuit behavior under CDM-ESD for protection device improvement},
  author={Kazuhiko Narita and Yukiko Horiguchi and Kimitoshi Hayano and Masato Shiga-gun Shiga-ken Suzuki},
  journal={Electrical Overstress/Electrostatic Discharge Symposium Proceedings. 1999 (IEEE Cat. No.99TH8396)},
  year={1999},
  pages={116-123}
}
The behavior of a quarter-micron CMOS LSI input circuit during charged device model (CDM) ESD has been investigated using a device simulator. The result clarifies the relationship between the protection device structure and the voltage difference that appears in the inner circuit and causes gate oxide breakdown. The result indicates that the most efficient protection device structure is an optimized lateral silicon-controlled rectifier (SCR). An improved structure that effectively prevents… CONTINUE READING

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New ESD protection circuits based on PNP triggering SCR for advanced CMOS device applications

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