A serial-in-serial-out hardware architecture for systematic encoding of Hermitian codes via Gro/spl uml/bner bases

@article{Chen2004ASH,
  title={A serial-in-serial-out hardware architecture for systematic encoding of Hermitian codes via Gro/spl uml/bner bases},
  author={Jia-Ping Chen and Chung-Chin Lu},
  journal={IEEE Transactions on Communications},
  year={2004},
  volume={52},
  pages={1322-1332}
}
When a nontrivial permutation of a Hermitian code is given, the code will have a module structure over a polynomial ring of one variable. By exploiting the theory of Gro/spl uml/bner bases for modules, a novel and elegant systematic encoding scheme for Hermitian codes is proposed by Heegard et al. (1995). The goal of this paper is to develop a serial-in-serial-out hardware architecture, similar to a classical cyclic encoder, for such a systematic encoding scheme. Moreover, we demonstrate that… CONTINUE READING
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