A scheduling model for reduced CPU energy

  title={A scheduling model for reduced CPU energy},
  author={F. Yao and A. Demers and S. Shenker},
  journal={Proceedings of IEEE 36th Annual Foundations of Computer Science},
  • F. Yao, A. Demers, S. Shenker
  • Published 1995
  • Computer Science
  • Proceedings of IEEE 36th Annual Foundations of Computer Science
  • The energy usage of computer systems is becoming an important consideration, especially for battery-operated systems. [...] Key Method In this model, each job is to be executed between its arrival time and deadline by a single processor with variable speed, under the assumption that energy usage per unit time, P, is a convex function, of the processor speed s. We give an off-line algorithm that computes, for any set of jobs, a minimum-energy schedule.Expand Abstract
    1,494 Citations
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    • 74
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    • 72
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    • Computer Science
    • 2014 16th International Symposium on Symbolic and Numeric Algorithms for Scientific Computing
    • 2014
    • 2
    Energy-Centric Scheduling for Real-Time Systems
    • 40
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    • 4
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    • 1,271
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    • 519
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    Low-power CMOS digital design
    • 2,993
    • PDF
    An energy-efficient CMOS line driver using adiabatic switching
    • 80
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    • ARPA semi-annual report
    • 1993
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    • 1992
    Compar - ing algorithms for dynamic speed - setting of a low - power CPU . preprint
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    • 1934
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    • 1934