A scalable model based RTL framework zamiaCAD for static analysis

  title={A scalable model based RTL framework zamiaCAD for static analysis},
  author={Anton Tsepurov and Gunter Bartsch and Rainer Dorsch and Maksim Jenihhin and Jaan Raik and Valentin Tihhomirov},
  journal={2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC)},
As of today, RTL still remains the primary abstraction level for VLSI SoC design entry and state-of-the-art design flows need to cope with designs of enormous size, and thus, to scale well. This paper presents an open-source framework zamiaCAD based on a scalable model that includes both, a comprehensive elaboration front-end for RTL design and design processing back-end flows. The persistence and scalability are guaranteed by a custom-designed and highly optimized object database. As an HDL… CONTINUE READING
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