A resource-efficient probabilistic fault simulator

  title={A resource-efficient probabilistic fault simulator},
  author={David May and Walter Stechele},
  journal={2013 23rd International Conference on Field programmable Logic and Applications},
The reduction of CMOS structures into the nanometer regime, as well as the high demand for low-power applications, animating to further reduce the supply voltages towards the threshold, results in an increased susceptibility of integrated circuits to soft errors. Hence, circuit reliability has become a major concern in today's VLSI design process. A new approach to further support these trends is to relax the reliability requirements of a circuit, while ensuring that the functionality of the… CONTINUE READING


Publications citing this paper.
Showing 1-4 of 4 extracted citations


Publications referenced by this paper.
Showing 1-10 of 12 references

Efficient Shift Registers, LFSR Counters, and Long Pseudo-Random Sequence Generators

  • P. Alfke
  • Xilinx, Tech. Rep., 1996, www.xilinx.com/bvdocs…
  • 1996
1 Excerpt

Similar Papers

Loading similar papers…