A reconfigurable architecture for entropy decoding and IDCT in H.264

@article{Lo2009ARA,
  title={A reconfigurable architecture for entropy decoding and IDCT in H.264},
  author={Chia-Cheng Lo and Shang-Ta Tsai and Ming-Der Shieh},
  journal={2009 International Symposium on VLSI Design, Automation and Test},
  year={2009},
  pages={279-282}
}
Reconfigurable hardware is an effective design option to cope with the increasing demands of simultaneous flexibility and computation power in system design. This paper explores techniques to combine the two entropy decoding methods, context-based adaptive binary arithmetic coding (CABAC) and context-based adaptive variable length coding (CAVLC), defined in the H.264 standard using the coarse-grain reconfigurable architecture. Coarsegrain reconfigurable architectures can provide obvious… CONTINUE READING

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