A processor interface model for fast system simulations

  title={A processor interface model for fast system simulations},
  author={G. S. Bolotin},
  journal={Sixth Annual IEEE International ASIC Conference and Exhibit},
The author presents an alternative technique for performing board level simulations of designs involving processors. This technique requires only a standard C compiler and a few simulation library functions to perform accurate board level simulations. This method is currently being used to simulate the IBM 1750A based GVSC inter-subassembly bus (ISB) and ASICs that are being developed for the Cassini spacecraft. This method is superior to the conventional processor modeling techniques, which… CONTINUE READING


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