A polyphase architecture for serial-input convolvers

  title={A polyphase architecture for serial-input convolvers},
  author={Luigi Dadda},
  journal={VLSI Signal Processing},
It is shown that a cascade of carry-free serial-parallel multipliers, fed by bit-serial samples with no separation between successive samples (i.e., with maximum sampling rate for a given bit rate), produces one convolution value every p with p > 1. This circuit is called a phase-convolver, and it is shown that a full convolver can be obtained by associating p phase convolvers (polyphase convolver). Under some assumptions, a polyphase convolver can be implemented as a stack of bit-slices. It… CONTINUE READING


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