A novel power model for future heterogeneous 3D chip-multiprocessors in the dark silicon age

  title={A novel power model for future heterogeneous 3D chip-multiprocessors in the dark silicon age},
  author={Arghavan Asad and Aniseh Dorostkar and Farah A. Mohammadi},
  journal={EURASIP Journal on Embedded Systems},
Dark silicon has recently emerged as a new problem in VLSI technology. Maximizing performance of chip-multiprocessors (CMPs) under power and thermal constraints is very challenging in the dark silicon era. Providing next-generation analytical models for future CMPs which consider the impact of power consumption of core and uncore components such as cache hierarchy and on-chip interconnect that consume significant portion of the on-chip power consumption is largely unexplored. In this article… 
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  • Gabriel H. Loh
  • Computer Science
    2008 International Symposium on Computer Architecture
  • 2008
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