A novel low-power full-adder cell with new technique in designing logical gates based on static CMOS inverter

@article{Navi2009ANL,
  title={A novel low-power full-adder cell with new technique in designing logical gates based on static CMOS inverter},
  author={Keivan Navi and Vahid Foroutan and Mostafa Rahimi Azghadi and Mehrdad Maeen and Maryam Ebrahimpour and M. Kaveh and Omid Kavehei},
  journal={Microelectronics Journal},
  year={2009},
  volume={40},
  pages={1441-1448}
}
A new low-power full-adder based on CMOS inverter is presented. This full-adder is comprised of inverters. Universal gates such as NOR, NAND and MAJORITY-NOT gates are implemented with a set of inverters and non-conventional implementation of them. In the proposed design approach the time consuming XOR gates are eliminated. As full-adders are frequently employed in a tree-structured configuration for high-performance arithmetic circuits, a cascaded simulation structure is employed to evaluate… CONTINUE READING
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