A novel high write speed, low power, read-SNM-free 6T SRAM cell

@article{Sil2008ANH,
  title={A novel high write speed, low power, read-SNM-free 6T SRAM cell},
  author={Abhijit Sil and Soumik Ghosh and Neeharikha Gogineni and M. S. Bayoumi},
  journal={2008 51st Midwest Symposium on Circuits and Systems},
  year={2008},
  pages={771-774}
}
In the nano-scaled technologies, increasing sub-threshold leakage, dynamic power and degrading SNM pose major hurdle for future generation circuits, especially in SRAM arrays. In this paper, a novel high write speed, low power, read-SNM-free 6T SRAM cell is presented. Simulation using 128 times 16 SRAM array in 90 nm CMOS technology shows that the cell can achieve 64% faster write operation than the conventional cell. Experimental results show that the write and read energy of the proposed cell… CONTINUE READING
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