A new modulo 2/sup a/+1 multiplier

@article{Wrzyszcz1993ANM,
  title={A new modulo 2/sup a/+1 multiplier},
  author={Artur Wrzyszcz and David Milford},
  journal={Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93},
  year={1993},
  pages={614-617}
}
This paper presents the design of a new modulo 2/sup a/ + 1 multiplier. It makes use of the redundancy in the binary representation of numbers in the finite integer ring R(2/sup 1/+1), though, unlike in some other designs, code translations are not involved. The use of the periodic properties of powers of two taken modulo 2/sup a/+1 simplifies the result correction process and permits a highly regular circuit structure which is suitable for VLSI implementation. Since the multiplier is almost… CONTINUE READING

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