A new flash E2PROM cell using triple polysilicon technology

@article{Masuoka1984ANF,
  title={A new flash E2PROM cell using triple polysilicon technology},
  author={Fujio Masuoka and Masamichi Asano and Hiroshi Iwahashi and T. Komuro and S. Tanaka},
  journal={1984 International Electron Devices Meeting},
  year={1984},
  pages={464-467}
}
A new Flash Electrically Erasable-PROM cell with single transistor per bit as same as conventional UV-EPROM(1) (2) and suitable for 256K bit F-E2PROM with rather conservative 2.0µm design rule is described. [...] Key Result Good erasing characteristics is obtained with 550Å of oxide thickness between floating gate and erase gate.Expand
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References

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Triple level polysilicon E2PROM with single transistor per bit
An electrically-erasable, floating-gate PROM cell utilizing three levels of polysilicon is described. The cell is programmed via a channel injection mechanism similar to EPROMS. Erasure is
Bit by bit erasable E2PROM with single transistor per bit
  • F. Masuoka
  • Physics
    1981 International Electron Devices Meeting
  • 1981
An electrically-erasable floating-gate PROM cell utilizing three levels of polysilicon is described. The cell is programmed via a channel injection mechanism similar to EPROM's Erasure is