A new NDA timing error detector for BPSK and QPSK with an efficient hardware implementation for ASIC-based and FPGA-based wireless receivers

@article{Linn2004ANN,
  title={A new NDA timing error detector for BPSK and QPSK with an efficient hardware implementation for ASIC-based and FPGA-based wireless receivers},
  author={Yair Linn},
  journal={2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)},
  year={2004},
  volume={4},
  pages={IV-465}
}
  • Yair Linn
  • Published 2004 in
    2004 IEEE International Symposium on Circuits and…
This paper introduces and characterizes a new Non Data Aided (NDA) Timing Error Detector (TED) for symbol timing recovery PLLs in BPSK and QPSK receivers operating in AWGN channels. The detector necessitates only two samples per symbol, and a simple hardware structure is found for its computation process, which allows for an exceptionally compact implementation in an FPGA or ASIC. The detector will further be shown to be signal-level independent and hence extremely resistant to fading and to… CONTINUE READING

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