A monolithic charge-balancing successive approximation A/D technique

@article{Redfern1979AMC,
  title={A monolithic charge-balancing successive approximation A/D technique},
  author={T. R. Redfern and J. Connolly and S. W. Chin and T. A. Frederiksen},
  journal={IEEE Journal of Solid-State Circuits},
  year={1979},
  volume={14},
  pages={912-920}
}
A new multiple-differential-voltage input, MOS, sampled-data, `charge-balance' comparator which can `weight' or scale each of many input voltage pairs has been developed. This comparator easily allows a differential analog input voltage capability on a monolithic A/D converter and greatly reduces the required number of resistors and decoding switches of a… CONTINUE READING