A modular synchronizing FIFO for NoCs

@article{OnoTesfaye2009AMS,
  title={A modular synchronizing FIFO for NoCs},
  author={Tarik Ono-Tesfaye and Mark R. Greenstreet},
  journal={2009 3rd ACM/IEEE International Symposium on Networks-on-Chip},
  year={2009},
  pages={224-233}
}
Systems-on-chip designs often use functional blocks operating at different clock frequencies. This motivates the use of an asynchronous network-on-chip (NoC) with synchronizing FIFOs interfacing between the NoC and the functional blocks. To minimize design time, these FIFOs should be constructed from cells available in a standard cell library and configurable to work in a wide range of applications. We present a modular synchronizing FIFO design that can be implemented using logic gates from a… CONTINUE READING

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