A microprocessor with a 128 b CPU, 10 floating-point MACs, 4 floating-point dividers, and an MPEG2 decoder


High-performance arithmetic operations and high-bandwidth data stream transfers are the keys in achieving high-quality image expression for computer entertainment applications. Integrating multiple arithmetic operating units with wide internal buses is the solution. For implementation, ten floating-point multiplier-accumulators, four floating-point dividers… (More)


Figures and Tables

Sorry, we couldn't extract any figures or tables for this paper.

Slides referencing similar topics