A methodology for abstracting RTL designs into TL descriptions

@article{Bombieri2006AMF,
  title={A methodology for abstracting RTL designs into TL descriptions},
  author={Nicola Bombieri and Franco Fummi and Graziano Pravadelli},
  journal={Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE '06. Proceedings.},
  year={2006},
  pages={103-112}
}
Transaction-level modeling (TLM) has been proposed as the leading strategy to address the always increasing complexity of digital systems. However, modeling a complex system completely at transaction level (TL) could be inconvenient when IP cores are available on the market, usually modeled at RT level. In this context, modeling and verification methodologies based on transactors allow one to reuse RTL IP-cores in TL-RTL mixed designs, thus guaranteeing a considerable saving of time. Even if… CONTINUE READING

Citations

Publications citing this paper.
Showing 1-10 of 10 extracted citations

Multi-level fault modeling for transaction-level specifications

ACM Great Lakes Symposium on VLSI • 2009
View 3 Excerpts
Highly Influenced

FSMD RTL design manipulation for clock interface abstraction

2015 International Conference on Advances in Computing, Communications and Informatics (ICACCI) • 2015
View 1 Excerpt

HIFSuite: Tools for HDL code conversion and manipulation

2010 IEEE International High Level Design Validation and Test Workshop (HLDVT) • 2010
View 1 Excerpt

RTL-TLM equivalence checking based on simulation

Proceedings of IEEE East-West Design & Test Symposium (EWDTS'08) • 2008
View 1 Excerpt

Towards Equivalence Checking Between TLM and RTL Models

2007 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE 2007) • 2007
View 5 Excerpts

Similar Papers

Loading similar papers…