A low-leakage twin-precision multiplier using reconfigurable power gating

@article{Sjlander2005ALT,
  title={A low-leakage twin-precision multiplier using reconfigurable power gating},
  author={Magnus Sj{\"a}lander and Mindaugas Drazdziulis and Per Larsson-Edefors and Henrik Eriksson},
  journal={2005 IEEE International Symposium on Circuits and Systems},
  year={2005},
  pages={1654-1657 Vol. 2}
}
A twin-precision multiplier that uses reconfigurable power gating is presented. Employing power cut-off techniques in independently controlled power-gating regions yields significant static leakage reductions when half-precision multiplications are carried out. In comparison to a conventional 8-bit tree multiplier, the power overhead of a 16-bit twin-precision multiplier operating at 8-bit precision has been reduced by 53% when reconfigurable power gating based on the SCCMOS power cut-off… CONTINUE READING
Highly Cited
This paper has 42 citations. REVIEW CITATIONS

From This Paper

Figures, tables, results, and topics from this paper.

Key Quantitative Results

  • In comparison to a conventional 8-bit tree multiplier, the power overhead of a 16-bit twin-precision multiplier operating at 8-bit precision has been reduced by 53% when reconfigurable power gating based on the SCCMOS power cut-off technique was applied.

Citations

Publications citing this paper.
Showing 1-10 of 21 extracted citations

References

Publications referenced by this paper.

Similar Papers

Loading similar papers…