A low-leakage high-speed monotonic static CMOS 64b adder in a dual gate oxide 65-nm CMOS technology

@article{Bastani2006ALH,
  title={A low-leakage high-speed monotonic static CMOS 64b adder in a dual gate oxide 65-nm CMOS technology},
  author={Ali Bastani and Charles A. Zukowski},
  journal={7th International Symposium on Quality Electronic Design (ISQED'06)},
  year={2006},
  pages={6 pp.-317}
}
In this paper, we investigate the use of monotonic static CMOS logic within a high performance carry lookahead adder (CLA) in the context of a 65nm technology with significant leakage. The goal is a good compromise between speed, power, and noise immunity. We compare the monotonic static CMOS 64b CLA with domino and static CMOS adders with respect to speed and power consumption, using a predictive dual gate oxide 65nm technology with significant gate leakage. The comparison shows that monotonic… CONTINUE READING