A low-cost implementation of Trivium

  title={A low-cost implementation of Trivium},
  author={Nele Mentens and Jan Genoe and Bart Preneel and Ingrid Verbauwhede},
This paper describes the implementation of two Trivium cores on a single chip. The cores are realized in a 5-metal 0.35μm AMIS technology. The chip is currently being manufactured. The first core on the chip is an automatically placed and routed standard cell core. The second one is a custom design using dynamic logic and CMOS flipflops. The goal of this paper is to evaluate and compare the size of the cores based on the lay-out results. The lay-out of the custom design shows a significant size… CONTINUE READING


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standard cell libraries

http://www.cadence.com/datasheets/4456 TSMC SC ds.pdf, • 2008
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