A highly scalable 8-layer 3D vertical-gate (VG) TFT NAND Flash using junction-free buried channel BE-SONOS device

@article{Lue2010AHS,
  title={A highly scalable 8-layer 3D vertical-gate (VG) TFT NAND Flash using junction-free buried channel BE-SONOS device},
  author={Hang-Ting Lue and Tzu-Hsuan Bruce Hsu and Yi-Hsuan Hsiao and S. P. Hong and M. T. Wu and F. H. Hsu and N. Z. Lien and Szu-Yu Wang and Jung-Yu Hsieh and Ling-Wu Yang and Tahone Yang and Kuang-Chao Chen and K. L. Hsieh and Chih-Yuan Lu},
  journal={2010 Symposium on VLSI Technology},
  year={2010},
  pages={131-132}
}
An 8-layer, 75 nm half-pitch, 3D stacked vertical-gate (VG) TFT BE-SONOS NAND Flash array is fabricated and characterized. We propose a buried-channel (n-type well) device to improve the read current of TFT NAND, and it also allows the junction-free structure which is particularly important for 3D stackable devices. Large self-boosting disturb-free memory window (6V) can be obtained in our device, and for the first time the “Z-interference” between adjacent vertical layers is studied. The… CONTINUE READING
Highly Cited
This paper has 96 citations. REVIEW CITATIONS
48 Citations
1 References
Similar Papers

Citations

Publications citing this paper.
Showing 1-10 of 48 extracted citations

96 Citations

0102030'12'14'16'18
Citations per Year
Semantic Scholar estimates that this publication has 96 citations based on the available data.

See our FAQ for additional information.

References

Publications referenced by this paper.

et al

  • T. H. Hsu
  • IEDM, pp. 629-632
  • 2009

Similar Papers

Loading similar papers…