A high-voltage output driver in a 2.5-V 0.25-/spl mu/m CMOS technology

@article{Serneels2005AHO,
  title={A high-voltage output driver in a 2.5-V 0.25-/spl mu/m CMOS technology},
  author={Bert Serneels and Tim Piessens and M S J Steyaert and Wim Dehaene},
  journal={IEEE Journal of Solid-State Circuits},
  year={2005},
  volume={40},
  pages={576-583}
}
The design of a high-voltage output driver in a digital 0.25-/spl mu/m 2.5-V technology is presented. The use of stacked devices with a self-biased cascode topology allows the driver to operate at three times the nominal supply voltage. Oxide stress and hot carrier degradation is minimized since the driver operates within the voltage limits imposed by the design rules of a mainstream CMOS technology. The proposed high-voltage architecture uses a switching output stage. The realized prototype… CONTINUE READING

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