A high speed low power modulo 2n+1 multiplier design using carbon-nanotube technology

@article{Qi2012AHS,
  title={A high speed low power modulo 2n+1 multiplier design using carbon-nanotube technology},
  author={He Qi and Yong-Bin Kim and Minsu Choi},
  journal={2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)},
  year={2012},
  pages={406-409}
}
Modulo 2n+1 multiplier is one of the critical components in the area of digital signal processing, residue arithmetic, and data encryption that demand high-speed and low-power operation. In this paper, a new circuit implementation of a high-speed low-power modulo 2n+1 multiplier is proposed. It has three major stages: partial product generation stage, partial product reduction stage, and the final adder stage. The proposed structure introduces a new MUX-based compressor in the partial product… CONTINUE READING

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