A high-performance JPEG2000 architecture
@article{Andra2003AHJ, title={A high-performance JPEG2000 architecture}, author={K. Andra and C. Chakrabarti and T. Acharya}, journal={IEEE Trans. Circuits Syst. Video Technol.}, year={2003}, volume={13}, pages={209-218} }
JPEG2000 is an upcoming compression standard for still images that has a feature set well tuned for diverse data dissemination. These features are possible due to adaptation of the discrete wavelet transform, intra-subband bit-plane coding, and binary arithmetic coding in the standard. We propose a system-level architecture capable of encoding and decoding the JPEG2000 core algorithm that has been defined in Part I of the standard. The key components include dedicated architectures for wavelet… CONTINUE READING
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References
SHOWING 1-10 OF 13 REFERENCES
Efficient VLSI implementation of bit plane coder of JPEG 2000
- Computer Science, Engineering
- Optics + Photonics
- 2001
- 22
- PDF
A VLSI architecture for lifting-based wavelet transform
- Computer Science
- 2000 IEEE Workshop on SiGNAL PROCESSING SYSTEMS. SiPS 2000. Design and Implementation (Cat. No.00TH8528)
- 2000
- 38
A VLSI architecture for lifting-based forward and inverse wavelet transform
- Computer Science
- IEEE Trans. Signal Process.
- 2002
- 378
- PDF
High performance scalable image compression with EBCOT
- Computer Science, Medicine
- IEEE Trans. Image Process.
- 2000
- 724
A Parallel Architecture for the 2-D Discrete Wavelet Transform with Integer Lifting Scheme
- Computer Science
- J. VLSI Signal Process.
- 2001
- 41
Efficient realizations of the discrete and continuous wavelet transforms: from single chip implementations to mappings on SIMD array computers
- Computer Science
- IEEE Trans. Signal Process.
- 1995
- 249
- PDF
Efficient implementation of a set of lifting based wavelet filters
- Mathematics, Computer Science
- 2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221)
- 2001
- 6
Lifting factorization-based discrete wavelet transform architecture design
- Computer Science
- IEEE Trans. Circuits Syst. Video Technol.
- 2001
- 78
- PDF