A high-level methodology for automatically generating dynamic partially reconfigurable systems using IP-XACT and the UML MARTE profile

Dynamic Partial Reconfiguration (DPR) has been introduced in recent years as a method to increase the flexibility of FPGA designs. However, using DPR for building complex systems remains a daunting task. Recently, approaches based on Model-Driven Engineering (MDE) and UML MARTE standard have emerged which aim to simplify the design of complex SoCs, and in… CONTINUE READING