A high-level analysis of a multi-core vision processor using SystemC and TLM2.0

@article{Mori2014AHA,
  title={A high-level analysis of a multi-core vision processor using SystemC and TLM2.0},
  author={Jones Yudi Mori and Michael H{\"u}bner},
  journal={2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)},
  year={2014},
  pages={1-6}
}
Vision Processors are integrated circuits with the aim to put together sensors and processing elements at the same chip. There are several constraints a designer may take into account when developing a vision processor: available technology, power consumption, thermal management, fault tolerance, speed, silicon area and application-specific needs. Most of these vision processors are based on analog circuits and can perform only low-level processing, like filtering and contrast adjustment… CONTINUE READING
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