• Corpus ID: 9164526

A high Speed 8 Transistor Full Adder Design Using Novel 3 Transistor XOR Gates

  title={A high Speed 8 Transistor Full Adder Design Using Novel 3 Transistor XOR Gates},
  author={Shubhajit Roy Chowdhury and Aritra Banerjee and Aniruddha Roy and Hiranmay Saha},
  journal={World Academy of Science, Engineering and Technology, International Journal of Electrical, Computer, Energetic, Electronic and Communication Engineering},
  • S. R. Chowdhury, A. Banerjee, H. Saha
  • Published 29 October 2008
  • Engineering
  • World Academy of Science, Engineering and Technology, International Journal of Electrical, Computer, Energetic, Electronic and Communication Engineering
The paper proposes the novel design of a 3T XOR gate combining complementary CMOS with pass transistor logic. The design has been compared with earlier proposed 4T and 6T XOR gates and a significant improvement in silicon area and power-delay product has been obtained. An eight transistor full adder has been designed using the proposed three-transistor XOR gate and its performance has been investigated using 0.15 m and 0.35 m technologies. Compared to the earlier designed 10 transistor full… 

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