A hardware/software framework for supporting transactional memory in a MPSoC environment
@article{Ferri2007AHF, title={A hardware/software framework for supporting transactional memory in a MPSoC environment}, author={C. Ferri and Tali Moreshet and R. I. Bahar and L. Benini and M. Herlihy}, journal={SIGARCH Comput. Archit. News}, year={2007}, volume={35}, pages={47-54} }
Manufacturers are focusing on multiprocessor-system-on-a-chip (MPSoC) architectures in order to provide increased concurrency, rather than increased clock speed, for both large-scale as well as embedded systems. Traditionally lock-based synchronization is provided to support concurrency; however, managing locks can be very difficult and error prone. In addition, the performance and power cost of lock-based synchronization can be high. Transactional memories have been extensively investigated as… CONTINUE READING
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