A generic CAD tool for efficient NoC design

@article{Evain2004AGC,
  title={A generic CAD tool for efficient NoC design},
  author={Samuel Evain and J.-P. Diguet and Dominique Houzet},
  journal={Proceedings of 2004 International Symposium on Intelligent Signal Processing and Communication Systems, 2004. ISPACS 2004.},
  year={2004},
  pages={728-733}
}
Network on chip (NoC) using packet switching is a solution to cope with complex system on chip (SoC) communications. However, tools are needed to help designers to deal with NoC. The two elements composing an NoC are its routers and its network interfaces (NI). We focus on the specification and generation steps of the /spl mu/spider NOC design flow that addresses what we consider as the main features of a realistic and useful NoC. Firstly, the synthesis tool is based on a generic router through… CONTINUE READING