A full parallel priority encoder design used in comparator

@article{Huang2010AFP,
  title={A full parallel priority encoder design used in comparator},
  author={Shaowei Huang and Yen-Jen Chang},
  journal={2010 53rd IEEE International Midwest Symposium on Circuits and Systems},
  year={2010},
  pages={877-880}
}
  • Shaowei Huang, Yen-Jen Chang
  • Published 2010
  • Computer Science
  • 2010 53rd IEEE International Midwest Symposium on Circuits and Systems
  • In this paper, we present an enhanced priority encoder, called full parallel priority encoder (FPPE) that can be used in the comparator circuitry. [...] Key Method The comparator with FPPE is implemented in UMC 90nm CMOS technology. The simulation results show that the proposed design is 40% and 12% faster than the comparator based on NAND-type priority encoder and the comparator based on parallel MSB checking comparison, respectively.Expand Abstract

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