A full parallel priority encoder design used in comparator

@article{Huang2010AFP,
  title={A full parallel priority encoder design used in comparator},
  author={Shao-Wei Huang and Yen-Jen Chang},
  journal={2010 53rd IEEE International Midwest Symposium on Circuits and Systems},
  year={2010},
  pages={877-880}
}
In this paper, we present an enhanced priority encoder, called full parallel priority encoder (FPPE) that can be used in the comparator circuitry. Because there is no serial NAND-type path, the performance of FPPE is better than that of the conventional priority encoder. The comparator with FPPE is implemented in UMC 90nm CMOS technology. The simulation results show that the proposed design is 40% and 12% faster than the comparator based on NAND-type priority encoder and the comparator based on… CONTINUE READING

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High-Performance and Power-Efficient CMOS Comparators

  • Chung-Hsun Huang, Jinn-Shyan Wang
  • IEEE Journal of Solid-State Circuits,
  • 2003
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