A floating-point FFT Twiddle factor implementation based on adaptive angle recoding CORDIC

Abstract

In this paper, a single-precision floating-point FFT Twiddle Factor (TF) implementation is proposed. The architecture is based on Adaptive Angle Recoding CORDIC (AARC) algorithm. The TF design is built and verified on Altera Stratix IV FPGA chip and 65nm SOTB synthesis. The FPGA implementation has 103.9 MHz maximum frequency, throughput result of 16.966… (More)

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Cite this paper

@article{VoThi2017AFF, title={A floating-point FFT Twiddle factor implementation based on adaptive angle recoding CORDIC}, author={Phuong-Thao Vo-Thi and Trong-Thuc Hoang and Cong-Kha Pham and Duc-Hung Le}, journal={2017 International Conference on Recent Advances in Signal Processing, Telecommunications & Computing (SigTelCom)}, year={2017}, pages={21-26} }