A flexible multi-channel high-resolution Time-to-Digital Converter ASIC

@inproceedings{Mota2000AFM,
  title={A flexible multi-channel high-resolution Time-to-Digital Converter ASIC},
  author={Manuel Mota and Jorgen Christiansen and S. D{\'e}bieux and Vladimir Ryjov and Paulo. Moreira and A. Marchioro},
  year={2000}
}
A data driven multi-channel Time-to-Digital Converter (TDC) circuit with programmable resolution (~25ps – 800ps binning) and a dynamic range of 102.4μs has been implemented in a 0.25μm CMOS technology. An on-chip PLL is used for clock multiplication up to 320MHz from an external 40MHz reference. A 32 element Delay Locked Loop (DLL) performs time interpolation down to 97.5ps. Finally, finer time interpolation is obtained using four samples of the DLL separated by 24.5ps generated by an… CONTINUE READING
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