A flexible FPGA-to-FPGA interconnect interface design and implementation


In FPGA-based SoCs, interconnect bus such as PCIe and Ethernet has a separate physical layer and physical layer interface. The physical layer (PHY) consumes quite a few power consumption and area overhead. In this paper, we propose a flexible interconnect interface (Unified PHY Interface, UPI) based on FPGA and describe its design. More specifically, UPI… (More)


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