A dual-mode architecture for fast-switching STT-RAM

  title={A dual-mode architecture for fast-switching STT-RAM},
  author={Zhenyu Sun and Hai Li and Wenqing Wu},
In the past, the spin-transfer torque RAM (STT-RAM) suffered from the slow write speed and the high write energy consumption. The latest progress in device engineering has dramatically reduced the write time to a few nanoseconds and hence enabled the fast-switching STT-RAM (FS-STT-RAM). However, the enhancement in write performance results in the degradation of read operations, in terms of both speed and data reliability. Our analysis shows that the read performance becomes critical. Based upon… CONTINUE READING
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Publications referenced by this paper.

Relaxing non-volatility for fast and energy-efficient STT-RAM caches

2011 IEEE 17th International Symposium on High Performance Computer Architecture • 2011
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