A dual-band 802.11a/b/g radio in 0.18 /spl mu/m CMOS

@article{Perraud2004AD8,
  title={A dual-band 802.11a/b/g radio in 0.18 /spl mu/m CMOS},
  author={L. Perraud and Christian Pinatel and M. Recouly and J.-L. Bonnot and N. Sornin and Franck Benoist and Marina Massei and O. Gibrat},
  journal={2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)},
  year={2004},
  pages={94-515 Vol.1}
}
A radio compliant with 802.11a/b/g standards occupies 12 mm/sup 2/ in 0.18 /spl mu/m CMOS. In the 54 Mb/s mode, the receivers have a sensitivity level below -73 dBm while consuming 230 mW. The transmitters, implementing a wide-band Cartesian feedback loop, deliver -2 dBm average power with an EVM of 3% while consuming 300 mW. 
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Fully integrated 10 GHz CMOS VCO for multi-band WLAN applications

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