A cryogenic CMOS chip for generating control signals for multiple qubits

  title={A cryogenic CMOS chip for generating control signals for multiple qubits},
  author={S. J. Pauka and Kushal Das and Rachpon Kalra and Alireza Moini and Y. Yang and Melissa Trainer and A. Bousquet and Chris Cantaloube and Nir Dick and Geoff C. Gardner and Michael J. Manfra and David J. Reilly},
  journal={Nature Electronics},
Scaled-up quantum computers will require control interfaces capable of the manipulation and readout of large numbers of qubits, which usually operate at millikelvin temperatures. Advanced complementary metal–oxide–semiconductor (CMOS) technology is an attractive platform for delivering such interfaces. However, this approach is generally discounted due to its high power dissipation, which can lead to the heating of fragile qubits. Here we report a CMOS-based platform that can provide multiple… 

CMOS-based cryogenic control of silicon quantum circuits.

A cryogenic CMOS control chip operating at 3 kelvin is reported, which outputs tailored microwave bursts to drive silicon quantum bits cooled to 20 millikelvin, and finds that the cryogenic control chip achieves the same fidelity as commercial instruments at room temperature.

Scalable Cryoelectronics for Superconducting Qubit Control and Readout

Quantum computing promises an exponentially higher computational power than classical computers; although all the building blocks have become available, certain constraints still prevent quantum

Superconducting routing platform for control and read-out of spin qubits

To reach large-scale quantum computing, three-dimensional integration of scalable qubit arrays and their control electronics in multi-chip assemblies is promising. Within these assemblies, the use of

Digital Control of a Superconducting Qubit Using a Josephson Pulse Generator at 3 K

Scaling of quantum computers to fault-tolerant levels relies critically on the integration of energyefficient, stable, and reproducible qubit control and readout electronics. In comparison to

Low-Temperature Characteristics of Nanowire Network Demultiplexer for Qubit Biasing

In current quantum computers, most qubit control electronics are connected to the qubit chip inside the cryostat by cables at room temperature. This poses a challenge when scaling the quantum chip to

Qubits made by advanced semiconductor manufacturing

Full-scale quantum computers require the integration of millions of qubits, and the potential of using industrial semiconductor manufacturing to meet this need has driven the development of quantum

A low-noise on-chip coherent microwave source

The scaleup of quantum computers operating in the microwave domain requires advanced control electronics, and the use of integrated components that operate at the temperature of the quantum devices

A cryo-CMOS chip that integrates silicon quantum dots and multiplexed dispersive readout electronics

As quantum computers grow in complexity, the technology will have to evolve from large distributed systems to compact integrated solutions. Spin qubits in silicon quantum dots are thought to offer

Monolithic Integration of Quantum Resonant Tunneling Gate on a 22nm FD-SOI CMOS Process

This work presents a fully integrated Quantum Processor Unit in which the quantum core is co-located with control and detection circuits on the same die in a commercial 22-nm FD-SOI process from GlobalFoundries and demonstrates the feasibility of the proposed architecture in scaling-up the existing quantum core to thousands of qubits.

Millikelvin temperature cryo-CMOS multiplexer for scalable quantum device characterisation

Quantum computers based on solid state qubits have been a subject of rapid development in recent years. In current noisy intermediate-scale quantum technology, each quantum device is controlled and



Cryo-CMOS Circuits and Systems for Quantum Computing Applications

A cryogenic control system is proposed, along with the required specifications, for the interface of the classical electronics with the quantum processor, and the functionality of key circuit blocks is experimentally demonstrated.

Cryogenic Control Architecture for Large-Scale Quantum Computing

Solid-state qubits have recently advanced to the level that enables them, in-principle, to be scaled-up into fault-tolerant quantum computers. As these physical qubits continue to advance, meeting

Control electronics for semiconductor spin qubits

The results show that with further research it is possible to provide scalable electrical control in the vicinity of the qubit, with the concept of a standard 65 nm complementary metal-oxide-semiconductor process.

Silicon CMOS architecture for a spin-based quantum computer

An architecture for a silicon-based quantum computer processor based on complementary metal-oxide-semiconductor (CMOS) technology featuring a spin qubit surface code and individual qubit control via floating memory gate electrodes is proposed.

Interfacing spin qubits in quantum dots and donors—hot, dense, and coherent

Semiconductor spins are one of the few qubit realizations that remain a serious candidate for the implementation of large-scale quantum circuits. Excellent scalability is often argued for spin qubits

29.1 A 28nm Bulk-CMOS 4-to-8GHz ¡2mW Cryogenic Pulse Modulator for Scalable Quantum Computing

The design and system-level characterization of a prototype cryo-CMOS IC for performing XY gate operations on transmon (XMON) qubits is reported.

19.1 A Scalable Cryo-CMOS 2-to-20GHz Digitally Intensive Controller for 4×32 Frequency Multiplexed Spin Qubits/Transmons in 22nm FinFET Technology for Quantum Computers

Quantum computers (QC), comprising qubits and a classical controller, can provide exponential speed-up in solving certain problems. Among solid-state qubits, transmons and spin-qubits are the most

Superconducting gatemon qubit based on a proximitized two-dimensional electron gas

It is demonstrated that semiconducting channels etched from a wafer-scale two-dimensional electron gas (2DEG) are a suitable platform for building a scalable gatemon-based quantum computer and measured qubit coherence times up to ~2 μs, limited by dielectric loss in the 2DEG substrate.

Engineering cryogenic setups for 100-qubit scale superconducting circuit systems

A robust cryogenic infrastructure in form of a wired, thermally optimized dilution refrigerator is essential for solid-state based quantum processors. Here, we engineer a cryogenic setup, which

Challenges in Scaling-up the Control Interface of a Quantum Computer

  • D. Reilly
  • Physics, Computer Science
    2019 IEEE International Electron Devices Meeting (IEDM)
  • 2019
An architecture for the interface that leverages cryo-CMOS circuits proximal to the quantum plane is motivated, leveraging protocols that enable massively-parallel readout of qubits via frequency multiplexing.