A cost-efficient dynamic Ternary CAM in 130 nm CMOS technology with planar complementary capacitors and TSR architecture

Abstract

A novel dynamic Ternary-CAM (TCAM) architecture with transparently scheduled refresh, address-input-free writing and planar complementary capacitors is proposed. The planar dynamic concept allows small TCAM cell size of 4.79 /spl mu/m/sup 2/ in a 130 nm CMOS technology that is about half of the static TCAM cell size, and the complementary capacitors improve… (More)

Topics

2 Figures and Tables

Slides referencing similar topics